Roadmap
The software stack runs end to end today, on a virtual bench and on a real Zephyr module. Here is what is done and what comes next.
What it achieves
Figures marked measured come from the Zephyr module firmware on an STM32H750 dev board, driven by the bench daemon. The production module's hardware trigger path is a target, to be confirmed on the prototype with a scope.
trigger line → rule action on the module
measuredworst lateness of scheduled actions at 480 MHz
measuredclient → module → client round trip
measuredevents dropped across 60 scheduled pulses
measuredpure-hardware trigger path (50–100 ns)
targetone spec YAML + one firmware app adds a module class. No daemon, client or MCP change.
builtwhole stack in CI on every push: firmware, Rust daemon, Python client
builtprice gap to industrial HIL we are validating with real quotes
targetWhere we are
Module protocol HMP v0.2 in CDDL, bench API v0.1, five module classes as machine-readable YAML. Guard tests check the daemon and both sides of the wire against them.
benchd in Rust, the Python client, pytest plugin, CLI, MCP server, bench page with run timeline, coverage and grant approval.
Simulated GPIO, UART, PSU, BLE and relay modules behind a real benchd. The whole stack runs in GitHub Actions on every push.
Zephyr firmware on an STM32H750 dev board, driven as a bench slot over USB. 17 client tests pass on it.
Hardware input-capture timestamps, trigger latency on a scope, and customer discovery with firmware teams.
Chassis, backplane and GPIO / UART / CAN-FD modules with 5–10 design partners running it in CI every week.
~20 beta units, Team software, then launch, CE/FCC and the v2 module roadmap.
Design partner program
We're looking for 5–10 firmware teams who ship at least monthly and test on hardware by hand or with a DIY rig today. Paid pilots, early hardware and a direct line to the people building it.
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